From: jbeulich@novell.com
Subject: Disallow all accesses to the local APIC page
Patch-mainline: obsolete
References: 191115

--- sle11sp1-2010-03-22.orig/arch/x86/include/asm/apic.h	2009-12-04 10:44:45.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/include/asm/apic.h	2009-10-13 17:19:31.000000000 +0200
@@ -10,7 +10,9 @@
 #include <asm/processor.h>
 #include <asm/apicdef.h>
 #include <asm/atomic.h>
+#ifndef CONFIG_XEN
 #include <asm/fixmap.h>
+#endif
 #include <asm/mpspec.h>
 #include <asm/system.h>
 #include <asm/msr.h>
@@ -49,6 +51,7 @@ static inline void generic_apic_probe(vo
 #ifdef CONFIG_X86_LOCAL_APIC
 
 extern unsigned int apic_verbosity;
+#ifndef CONFIG_XEN
 extern int local_apic_timer_c2_ok;
 
 extern int disable_apic;
@@ -121,6 +124,8 @@ extern u64 native_apic_icr_read(void);
 
 extern int x2apic_mode;
 
+#endif /* CONFIG_XEN */
+
 #ifdef CONFIG_X86_X2APIC
 /*
  * Make previous memory operations globally visible before
@@ -367,6 +372,8 @@ struct apic {
  */
 extern struct apic *apic;
 
+#ifndef CONFIG_XEN
+
 /*
  * APIC functionality to boot other CPUs - only used on SMP:
  */
@@ -460,6 +467,8 @@ static inline void default_wait_for_init
 
 extern void generic_bigsmp_probe(void);
 
+#endif /* CONFIG_XEN */
+
 
 #ifdef CONFIG_X86_LOCAL_APIC
 
@@ -479,6 +488,8 @@ static inline const struct cpumask *defa
 DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
 
 
+#ifndef CONFIG_XEN
+
 static inline unsigned int read_apic_id(void)
 {
 	unsigned int reg;
@@ -590,6 +601,8 @@ static inline physid_mask_t default_apic
 	return physid_mask_of_physid(phys_apicid);
 }
 
+#endif /* CONFIG_XEN */
+
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_X86_32
--- sle11sp1-2010-03-22.orig/arch/x86/include/asm/apicdef.h	2010-03-22 12:07:53.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/include/asm/apicdef.h	2009-10-14 17:01:50.000000000 +0200
@@ -11,6 +11,8 @@
 #define IO_APIC_DEFAULT_PHYS_BASE	0xfec00000
 #define	APIC_DEFAULT_PHYS_BASE		0xfee00000
 
+#ifndef CONFIG_XEN
+
 #define	APIC_ID		0x20
 
 #define	APIC_LVR	0x30
@@ -136,6 +138,16 @@
 #define APIC_BASE_MSR	0x800
 #define X2APIC_ENABLE	(1UL << 10)
 
+#else /* CONFIG_XEN */
+
+enum {
+	APIC_DEST_ALLBUT = 0x1,
+	APIC_DEST_SELF,
+	APIC_DEST_ALLINC
+};
+
+#endif /* CONFIG_XEN */
+
 #ifdef CONFIG_X86_32
 # define MAX_IO_APICS 64
 #else
@@ -143,6 +155,8 @@
 # define MAX_LOCAL_APIC 32768
 #endif
 
+#ifndef CONFIG_XEN
+
 /*
  * All x86-64 systems are xAPIC compatible.
  * In the following, "apicid" is a physical APIC ID.
@@ -413,6 +427,8 @@ struct local_apic {
 
 #undef u32
 
+#endif /* CONFIG_XEN */
+
 #ifdef CONFIG_X86_32
  #define BAD_APICID 0xFFu
 #else
--- sle11sp1-2010-03-22.orig/arch/x86/include/mach-xen/asm/fixmap.h	2009-11-06 10:52:22.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/include/mach-xen/asm/fixmap.h	2009-10-13 17:19:31.000000000 +0200
@@ -17,7 +17,6 @@
 #ifndef __ASSEMBLY__
 #include <linux/kernel.h>
 #include <asm/acpi.h>
-#include <asm/apicdef.h>
 #include <asm/page.h>
 #ifdef CONFIG_X86_32
 #include <linux/threads.h>
@@ -82,10 +81,10 @@ enum fixed_addresses {
 #endif
 	FIX_DBGP_BASE,
 	FIX_EARLYCON_MEM_BASE,
+#ifndef CONFIG_XEN
 #ifdef CONFIG_X86_LOCAL_APIC
 	FIX_APIC_BASE,	/* local (CPU) APIC) -- required for SMP or not */
 #endif
-#ifndef CONFIG_XEN
 #ifdef CONFIG_X86_IO_APIC
 	FIX_IO_APIC_BASE_0,
 	FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
--- sle11sp1-2010-03-22.orig/arch/x86/include/mach-xen/asm/smp.h	2009-11-20 11:18:10.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/include/mach-xen/asm/smp.h	2009-11-20 11:20:18.000000000 +0100
@@ -15,7 +15,7 @@
 #  include <asm/io_apic.h>
 # endif
 #endif
-#include <asm/thread_info.h>
+#include <linux/thread_info.h>
 #include <asm/cpumask.h>
 
 extern int smp_num_siblings;
@@ -168,7 +168,7 @@ extern unsigned disabled_cpus __cpuinitd
 
 #include <asm/smp-processor-id.h>
 
-#ifdef CONFIG_X86_LOCAL_APIC
+#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_XEN)
 
 #ifndef CONFIG_X86_64
 static inline int logical_smp_processor_id(void)
--- sle11sp1-2010-03-22.orig/arch/x86/kernel/acpi/boot.c	2010-02-17 14:50:55.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/kernel/acpi/boot.c	2010-02-18 15:30:28.000000000 +0100
@@ -72,13 +72,13 @@ int acpi_sci_override_gsi __initdata;
 #ifndef CONFIG_XEN
 int acpi_skip_timer_override __initdata;
 int acpi_use_timer_override __initdata;
-#else
-#define acpi_skip_timer_override 0
-#endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
 #endif
+#else
+#define acpi_skip_timer_override 0
+#endif
 
 #ifndef __HAVE_ARCH_CMPXCHG
 #warning ACPI uses CMPXCHG, i486 and later hardware
@@ -137,6 +137,7 @@ static int __init acpi_parse_madt(struct
 		return -ENODEV;
 	}
 
+#ifndef CONFIG_XEN
 	if (madt->address) {
 		acpi_lapic_addr = (u64) madt->address;
 
@@ -144,7 +145,6 @@ static int __init acpi_parse_madt(struct
 		       madt->address);
 	}
 
-#ifndef CONFIG_XEN
 	default_acpi_madt_oem_check(madt->header.oem_id,
 				    madt->header.oem_table_id);
 #endif
@@ -245,6 +245,7 @@ static int __init
 acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
 			  const unsigned long end)
 {
+#ifndef CONFIG_XEN
 	struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
 
 	lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
@@ -253,6 +254,7 @@ acpi_parse_lapic_addr_ovr(struct acpi_su
 		return -EINVAL;
 
 	acpi_lapic_addr = lapic_addr_ovr->address;
+#endif
 
 	return 0;
 }
@@ -1089,7 +1091,7 @@ int mp_register_gsi(struct device *dev, 
 
 	ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
 
-#ifdef CONFIG_X86_32
+#if defined(CONFIG_X86_32) && !defined(CONFIG_XEN)
 	if (ioapic_renumber_irq)
 		gsi = ioapic_renumber_irq(ioapic, gsi);
 #endif
--- sle11sp1-2010-03-22.orig/arch/x86/kernel/apic/io_apic-xen.c	2010-03-22 12:52:03.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/kernel/apic/io_apic-xen.c	2010-03-22 12:59:10.000000000 +0100
@@ -1093,7 +1093,9 @@ static inline int irq_trigger(int idx)
 	return MPBIOS_trigger(idx);
 }
 
+#ifndef CONFIG_XEN
 int (*ioapic_renumber_irq)(int ioapic, int irq);
+#endif
 static int pin_2_irq(int idx, int apic, int pin)
 {
 	int irq, i;
@@ -1115,11 +1117,13 @@ static int pin_2_irq(int idx, int apic, 
 		while (i < apic)
 			irq += nr_ioapic_registers[i++];
 		irq += pin;
+#ifndef CONFIG_XEN
 		/*
                  * For MPS mode, so far only needed by ES7000 platform
                  */
 		if (ioapic_renumber_irq)
 			irq = ioapic_renumber_irq(apic, irq);
+#endif
 	}
 
 #ifdef CONFIG_X86_32
@@ -4068,10 +4072,12 @@ int io_apic_set_pci_routing(struct devic
 u8 __init io_apic_unique_id(u8 id)
 {
 #ifdef CONFIG_X86_32
+#ifndef CONFIG_XEN
 	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
 	    !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
 		return io_apic_get_unique_id(nr_ioapics, id);
 	else
+#endif
 		return id;
 #else
 	int i;
--- sle11sp1-2010-03-22.orig/arch/x86/kernel/irq-xen.c	2010-01-07 11:22:50.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/kernel/irq-xen.c	2009-12-18 10:14:24.000000000 +0100
@@ -15,9 +15,9 @@
 #include <asm/mce.h>
 #include <asm/hw_irq.h>
 
+#ifndef CONFIG_XEN
 atomic_t irq_err_count;
 
-#ifndef CONFIG_XEN
 /* Function pointer for generic interrupt vector handling */
 void (*generic_interrupt_extension)(void) = NULL;
 #endif
@@ -57,7 +57,7 @@ static int show_other_interrupts(struct 
 	for_each_online_cpu(j)
 		seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
 	seq_printf(p, "  Non-maskable interrupts\n");
-#ifdef CONFIG_X86_LOCAL_APIC
+#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_XEN)
 	seq_printf(p, "%*s: ", prec, "LOC");
 	for_each_online_cpu(j)
 		seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
@@ -122,10 +122,12 @@ static int show_other_interrupts(struct 
 		seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
 	seq_printf(p, "  Machine check polls\n");
 #endif
+#ifndef CONFIG_XEN
 	seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
 #if defined(CONFIG_X86_IO_APIC)
 	seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
 #endif
+#endif
 	return 0;
 }
 
@@ -221,12 +223,16 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
 
 u64 arch_irq_stat(void)
 {
+#ifndef CONFIG_XEN
 	u64 sum = atomic_read(&irq_err_count);
 
 #ifdef CONFIG_X86_IO_APIC
 	sum += atomic_read(&irq_mis_count);
 #endif
 	return sum;
+#else
+	return 0;
+#endif
 }
 
 
--- sle11sp1-2010-03-22.orig/arch/x86/kernel/mpparse-xen.c	2010-03-01 14:45:20.000000000 +0100
+++ sle11sp1-2010-03-22/arch/x86/kernel/mpparse-xen.c	2010-03-01 14:47:29.000000000 +0100
@@ -288,7 +288,9 @@ static int __init smp_check_mpc(struct m
 
 	printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
 
+#ifndef CONFIG_XEN
 	printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
+#endif
 
 	return 1;
 }
@@ -320,12 +322,14 @@ static int __init smp_read_mpc(struct mp
 	if (!smp_check_mpc(mpc, oem, str))
 		return 0;
 
-#if defined(CONFIG_X86_32) && !defined(CONFIG_XEN)
+#ifndef CONFIG_XEN
+#ifdef CONFIG_X86_32
 	generic_mps_oem_check(mpc, oem, str);
 #endif
 	/* save the local APIC address, it might be non-default */
 	if (!acpi_lapic)
 		mp_lapic_addr = mpc->lapic;
+#endif
 
 	if (early)
 		return 1;
@@ -512,10 +516,12 @@ static inline void __init construct_defa
 	int linttypes[2] = { mp_ExtINT, mp_NMI };
 	int i;
 
+#ifndef CONFIG_XEN
 	/*
 	 * local APIC has default address
 	 */
 	mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
+#endif
 
 	/*
 	 * 2 CPUs, numbered 0 & 1.
@@ -648,10 +654,12 @@ void __init default_get_smp_config(unsig
 	 */
 	if (mpf->feature1 != 0) {
 		if (early) {
+#ifndef CONFIG_XEN
 			/*
 			 * local APIC has default address
 			 */
 			mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
+#endif
 			return;
 		}
 
--- sle11sp1-2010-03-22.orig/drivers/xen/core/smpboot.c	2010-03-22 12:57:50.000000000 +0100
+++ sle11sp1-2010-03-22/drivers/xen/core/smpboot.c	2010-03-22 12:59:04.000000000 +0100
@@ -362,7 +362,7 @@ void __init smp_prepare_cpus(unsigned in
 	 * Here we can be sure that there is an IO-APIC in the system. Let's
 	 * go and set it up:
 	 */
-	if (!skip_ioapic_setup && nr_ioapics)
+	if (cpu_has_apic && !skip_ioapic_setup && nr_ioapics)
 		setup_IO_APIC();
 #endif
 }
