\initial {C}
\entry {\code {catch_exception_raise}}{70}
\initial {D}
\entry {\code {device_close}}{96}
\entry {\code {device_get_status}}{99}
\entry {\code {device_map}}{98}
\entry {\code {device_open}}{95}
\entry {\code {device_open_request}}{96}
\entry {\code {device_read}}{96}
\entry {\code {device_read_inband}}{97}
\entry {\code {device_read_request}}{97}
\entry {\code {device_read_request_inband}}{97}
\entry {\code {device_reply_server}}{95}
\entry {\code {device_set_filter}}{99}
\entry {\code {device_set_status}}{99}
\entry {\code {device_write}}{97}
\entry {\code {device_write_inband}}{98}
\entry {\code {device_write_request}}{98}
\entry {\code {device_write_request_inband}}{98}
\entry {\code {ds_device_open_reply}}{96}
\entry {\code {ds_device_read_reply}}{97}
\entry {\code {ds_device_read_reply_inband}}{97}
\entry {\code {ds_device_write_reply}}{98}
\entry {\code {ds_device_write_reply_inband}}{98}
\initial {E}
\entry {\code {evc_wait}}{70}
\entry {\code {exception_raise}}{70}
\initial {H}
\entry {\code {host_adjust_time}}{84}
\entry {\code {host_basic_info_t}}{82}
\entry {\code {host_get_boot_info}}{83}
\entry {\code {host_get_time}}{84}
\entry {\code {host_info}}{81}
\entry {\code {host_kernel_version}}{83}
\entry {\code {host_processor_set_priv}}{87}
\entry {\code {host_processor_sets}}{87}
\entry {\code {host_processors}}{92}
\entry {\code {host_reboot}}{84}
\entry {\code {host_sched_info_t}}{83}
\entry {\code {host_set_time}}{84}
\initial {M}
\entry {\code {mach_host_self}}{81}
\entry {\code {mach_msg}}{14}
\entry {\code {mach_msg_bits_t}}{15}
\entry {\code {mach_msg_header_t}}{15}
\entry {\code {mach_msg_id_t}}{15}
\entry {\code {mach_msg_size_t}}{15}
\entry {\code {mach_msg_type_long_t}}{19}
\entry {\code {mach_msg_type_name_t}}{17}
\entry {\code {mach_msg_type_number_t}}{17}
\entry {\code {MACH_MSG_TYPE_PORT_ANY}}{19}
\entry {\code {MACH_MSG_TYPE_PORT_ANY_RIGHT}}{19}
\entry {\code {MACH_MSG_TYPE_PORT_ANY_SEND}}{19}
\entry {\code {mach_msg_type_size_t}}{17}
\entry {\code {mach_msg_type_t}}{17}
\entry {\code {MACH_MSGH_BITS}}{16}
\entry {\code {MACH_MSGH_BITS_LOCAL}}{17}
\entry {\code {MACH_MSGH_BITS_OTHER}}{17}
\entry {\code {MACH_MSGH_BITS_PORTS}}{17}
\entry {\code {MACH_MSGH_BITS_REMOTE}}{17}
\entry {\code {mach_port_allocate}}{29}
\entry {\code {mach_port_allocate_name}}{30}
\entry {\code {mach_port_deallocate}}{31}
\entry {\code {mach_port_destroy}}{31}
\entry {\code {mach_port_extract_right}}{35}
\entry {\code {mach_port_get_receive_status}}{37}
\entry {\code {mach_port_get_refs}}{33}
\entry {\code {mach_port_get_set_status}}{38}
\entry {\code {mach_port_insert_right}}{35}
\entry {\code {mach_port_mod_refs}}{34}
\entry {\code {mach_port_move_member}}{38}
\entry {\code {mach_port_mscount_t}}{36}
\entry {\code {mach_port_msgcount_t}}{36}
\entry {\code {mach_port_names}}{32}
\entry {\code {mach_port_rename}}{33}
\entry {\code {mach_port_request_notification}}{39}
\entry {\code {mach_port_rights_t}}{36}
\entry {\code {mach_port_seqno_t}}{36}
\entry {\code {mach_port_set_mscount}}{37}
\entry {\code {mach_port_set_qlimit}}{37}
\entry {\code {mach_port_set_seqno}}{38}
\entry {\code {mach_port_status_t}}{36}
\entry {\code {mach_port_t}}{15}
\entry {\code {mach_port_type}}{32}
\entry {\code {mach_reply_port}}{30}
\entry {\code {mach_task_self}}{71}
\entry {\code {mach_thread_self}}{61}
\entry {\code {mapped_time_value_t}}{84}
\entry {\code {memory_object_change_attributes}}{58}
\entry {\code {memory_object_change_completed}}{59}
\entry {\code {memory_object_copy}}{55}
\entry {\code {memory_object_create}}{59}
\entry {\code {memory_object_data_error}}{54}
\entry {\code {memory_object_data_initialize}}{60}
\entry {\code {memory_object_data_provided}}{56}
\entry {\code {memory_object_data_request}}{52}
\entry {\code {memory_object_data_return}}{52}
\entry {\code {memory_object_data_supply}}{53}
\entry {\code {memory_object_data_unavailable}}{54}
\entry {\code {memory_object_data_unlock}}{57}
\entry {\code {memory_object_default_server}}{49}
\entry {\code {memory_object_destroy}}{51}
\entry {\code {memory_object_get_attributes}}{58}
\entry {\code {memory_object_init}}{49}
\entry {\code {memory_object_lock_completed}}{57}
\entry {\code {memory_object_lock_request}}{56}
\entry {\code {memory_object_ready}}{50}
\entry {\code {memory_object_server}}{49}
\entry {\code {memory_object_supply_completed}}{53}
\entry {\code {memory_object_terminate}}{51}
\initial {N}
\entry {\code {natural_t}}{15}
\initial {P}
\entry {\code {processor_assign}}{93}
\entry {\code {processor_basic_info_t}}{94}
\entry {\code {processor_control}}{92}
\entry {\code {processor_exit}}{92}
\entry {\code {processor_get_assignment}}{93}
\entry {\code {processor_info}}{93}
\entry {\code {processor_set_basic_info_t}}{92}
\entry {\code {processor_set_create}}{87}
\entry {\code {processor_set_default}}{87}
\entry {\code {processor_set_destroy}}{88}
\entry {\code {processor_set_info}}{91}
\entry {\code {processor_set_max_priority}}{90}
\entry {\code {processor_set_policy_disable}}{90}
\entry {\code {processor_set_policy_enable}}{90}
\entry {\code {processor_set_sched_info_t}}{92}
\entry {\code {processor_set_tasks}}{88}
\entry {\code {processor_set_threads}}{88}
\entry {\code {processor_start}}{92}
\initial {S}
\entry {\code {sample_pc_flavor_t}}{78}
\entry {\code {sample_pc_t}}{78}
\entry {\code {seqnos_memory_object_change_completed}}{59}
\entry {\code {seqnos_memory_object_copy}}{55}
\entry {\code {seqnos_memory_object_create}}{59}
\entry {\code {seqnos_memory_object_data_initialize}}{60}
\entry {\code {seqnos_memory_object_data_request}}{52}
\entry {\code {seqnos_memory_object_data_return}}{52}
\entry {\code {seqnos_memory_object_data_unlock}}{57}
\entry {\code {seqnos_memory_object_default_server}}{49}
\entry {\code {seqnos_memory_object_init}}{50}
\entry {\code {seqnos_memory_object_lock_completed}}{57}
\entry {\code {seqnos_memory_object_server}}{49}
\entry {\code {seqnos_memory_object_supply_completed}}{54}
\entry {\code {seqnos_memory_object_terminate}}{51}
\entry {\code {struct host_basic_info}}{82}
\entry {\code {struct host_sched_info}}{82}
\entry {\code {struct processor_basic_info}}{94}
\entry {\code {struct processor_set_basic_info}}{91}
\entry {\code {struct processor_set_sched_info}}{92}
\entry {\code {struct task_basic_info}}{72}
\entry {\code {struct task_events_info}}{73}
\entry {\code {struct task_thread_times_info}}{73}
\entry {\code {struct thread_basic_info}}{62}
\entry {\code {struct thread_sched_info}}{63}
\entry {\code {swtch}}{68}
\entry {\code {swtch_pri}}{69}
\initial {T}
\entry {\code {task_assign}}{88}
\entry {\code {task_assign_default}}{89}
\entry {\code {task_basic_info_t}}{73}
\entry {\code {task_create}}{70}
\entry {\code {task_disable_pc_sampling}}{77}
\entry {\code {task_enable_pc_sampling}}{77}
\entry {\code {task_events_info_t}}{73}
\entry {\code {task_get_assignment}}{89}
\entry {\code {task_get_bootstrap_port}}{76}
\entry {\code {task_get_emulation_vector}}{77}
\entry {\code {task_get_exception_port}}{76}
\entry {\code {task_get_kernel_port}}{76}
\entry {\code {task_get_sampled_pcs}}{78}
\entry {\code {task_get_special_port}}{75}
\entry {\code {task_info}}{72}
\entry {\code {task_priority}}{74}
\entry {\code {task_ras_control}}{74}
\entry {\code {task_resume}}{74}
\entry {\code {task_set_bootstrap_port}}{76}
\entry {\code {task_set_emulation}}{77}
\entry {\code {task_set_emulation_vector}}{77}
\entry {\code {task_set_exception_port}}{76}
\entry {\code {task_set_kernel_port}}{76}
\entry {\code {task_set_special_port}}{76}
\entry {\code {task_suspend}}{74}
\entry {\code {task_terminate}}{71}
\entry {\code {task_thread_times_info_t}}{74}
\entry {\code {task_threads}}{71}
\entry {\code {thread_abort}}{65}
\entry {\code {thread_assign}}{89}
\entry {\code {thread_assign_default}}{89}
\entry {\code {thread_basic_info_t}}{63}
\entry {\code {thread_create}}{61}
\entry {\code {thread_depress_abort}}{68}
\entry {\code {thread_disable_pc_sampling}}{77}
\entry {\code {thread_enable_pc_sampling}}{77}
\entry {\code {thread_get_assignment}}{89}
\entry {\code {thread_get_exception_port}}{69}
\entry {\code {thread_get_kernel_port}}{69}
\entry {\code {thread_get_sampled_pcs}}{78}
\entry {\code {thread_get_special_port}}{69}
\entry {\code {thread_get_state}}{66}
\entry {\code {thread_info}}{62}
\entry {\code {thread_max_priority}}{67}
\entry {\code {thread_policy}}{69}
\entry {\code {thread_priority}}{67}
\entry {\code {thread_resume}}{65}
\entry {\code {thread_sched_info_t}}{64}
\entry {\code {thread_set_exception_port}}{70}
\entry {\code {thread_set_kernel_port}}{70}
\entry {\code {thread_set_special_port}}{70}
\entry {\code {thread_set_state}}{66}
\entry {\code {thread_suspend}}{64}
\entry {\code {thread_switch}}{67}
\entry {\code {thread_terminate}}{61}
\entry {\code {thread_wire}}{64}
\entry {\code {time_value_add}}{83}
\entry {\code {time_value_add_usec}}{83}
\entry {\code {time_value_t}}{83}
\initial {V}
\entry {\code {vm_allocate}}{41}
\entry {\code {vm_copy}}{43}
\entry {\code {vm_deallocate}}{41}
\entry {\code {vm_inherit}}{44}
\entry {\code {vm_machine_attribute}}{45}
\entry {\code {vm_map}}{46}
\entry {\code {vm_protect}}{43}
\entry {\code {vm_read}}{42}
\entry {\code {vm_region}}{43}
\entry {\code {vm_set_default_memory_manager}}{59}
\entry {\code {vm_statistics}}{48}
\entry {\code {vm_statistics_data_t}}{47}
\entry {\code {vm_wire}}{44}
\entry {\code {vm_write}}{42}